The shift to exascale computing has brought significant changes to computing paradigms, driven by the need to process and analyze massive datasets using machine learning (ML) and deep learning (DL) techniques across various applications.
A key challenge in this context is efficiently moving data to and from memory without encountering memory-wall bottlenecks. To tackle this, in-memory computing (IMC) and related frameworks have been developed. IMC methods offer ultra-low power consumption and high-density embedded storage. Among these, Resistive Random-Access Memory (ReRAM) stands out as a promising IMC solution, thanks to its low leakage power, reduced energy use, compact hardware footprint, and compatibility with widely adopted CMOS technology.
This book introduces ReRAM-based techniques for distributed computing with IMC accelerators, details ReRAM-based IMC architectures capable of handling ML and data-intensive workloads, and discusses strategies for mapping ML models onto hardware accelerators.
Serving as a link between ML/DL algorithm designers and computing hardware engineers, this book bridges the gap between software and hardware in the era of exascale computing.
